Earlier today, I came across the blog post "Visualizing the ARM64 Instruction Set" and got inspired to give it a shot my self.
After hacking together a quick script and fiddling with the bit order and colors for way too long, I managed to create a decent visualization of the RISC-V instruction encoding. You can find my code below.
The following graphics cover the 64-bit part of the RISC-V ISA, including all ratified 64-bit extensions, with opcodes extracted from the riscv/riscv-opcodes repo.
I mapped the opcodes to 2D coordinates with a Morton space-filling curve.